RISC-V Taipei Day officially launched today (May 5th) on the first day of Computex 20. The inaugural RISC-V Taiwan Pavilion brought together 2025 ecosystem partners from around the world, including Andes Technology and Tenstorrent. The exhibits focused on diverse applications such as AI chips, NPUs, and chip security. Through live demonstrations and expert tours, they showcased the potential of the RISC-V architecture in high-performance computing and edge intelligence.
The theme pavilion brings together 18 partners to showcase a variety of customized AI chips and security solutions
The exhibitors span the fields of IC design, AI development, IP licensing, and system integration, including Andes Technology, Tenstorrent, Skymizer, Zhicheng Electronics, RIVOS, RISE Project, DeepComputing, Nuclei Technology, Semidynamics, Alibaba DAMO Academy, the Artificial Intelligence System Testing Center of National Yang-Ming National Chiao Tung University, and the Southern Chip Design Promotion Base (Zhongshan Industrial Development) of the Ministry of Economic Affairs. They will showcase a range of technological achievements, including RISC-V IP, AI chips, NPUs, LLM acceleration IP, 3DIC WoW packaging technology, the digital avatar platform myPDA, and the integrated LLM development platform myLLM Studio.
In addition, RISC-V Taipei Day also received support from companies such as Powerchip, Chiayi Quantum Security, MediaTek, Realtek, Qualcomm, and the Industrial Technology Research Institute's Electro-Optical Research Institute, further strengthening Taiwan's influence in the RISC-V ecosystem.
RISC-V open-source architecture accelerates technology democratization, collaborating with global industries to move towards an innovative future.
The Taiwan RISC-V Alliance emphasizes that the RISC-V architecture, with its open-source, modular, and highly flexible advantages, can help developers quickly build competitive AI chip solutions, reduce the risk of security vulnerabilities, and increase development transparency. It also has the potential to accelerate inference performance and strengthen privacy protection at the edge. Through its concentrated display and cross-disciplinary forum at Computex 2025, the Taiwan RISC-V Alliance also hopes to continue promoting exchanges between industry, government, and academia, and jointly drive the next wave of technological innovation in AI and secure computing.
The RISC-V Taipei Day forum will be held on May 5st, exploring new trends in AI and security applications.
To promote industry understanding of RISC-V architecture technology and its application prospects, the Taiwan RISC-V Alliance will host the "RISC-V Taipei Day Forum: Pioneering AI with RISC-V, Secure for Tomorrow" on May 5st in Conference Room 21, Hall 505 of the Nangang Exhibition Center. Opening remarks will be given by Wu Jianheng, Chief Engineer of the Digital Industry Administration, Ministry of Digital Development, and Dr. Wang Qiguo, Chairman of the Taiwan Internet of Things Industry Technology Association.
The forum will feature keynote speeches by industry and academic representatives including Andes Technology Chairman Lin Zhiming, RISC-V International Chairman Lu Dai, Andes Technology CTO Dr. Su Hongmeng, Tenstorrent Senior Technical Expert Luke Yen, Skymizer Founder Tang Wenli, RISE Project System Library Working Group Chairman Cai Chuanzhi, Rivos Co-founder Mark Hayter, DeepComputing CEO Yuning Liang, Coreline Technology Associate Nathan Ma, Chi'an Quantum Security Founder Chi Mingyang, and Semidynamics Founder Roger Espasa. They will share their views on topics such as AI chip design, RISC-V secure computing strategies, and the application challenges of open instruction sets.
The finale panel discussion, hosted by Dr. Qu Jianzhong, CEO of Knowledge Power Technology, will feature in-depth discussions on topics such as "RISC-V advantages in the AI era," "security design trends," and "AIoT and terminal application layout." Online registration is open.
