JEDEC Solid State Technology Association announcedDDR5 MRDIMM and LPDDR6 CAMM memory module design standardsThe former will be compatible with the existing RDIMM (Registered DIMM) memory module definition, and will increase data transmission bandwidth and capacity through multi-row memory particles and multi-signal single transmission channel design. The latter is based on the LPDDR6 memory specification, adopts the CAMM memory specification design, and allows data transmission bandwidth to reach 14.4GT/s.
Both can increase data computing transmission rates, thereby corresponding to higher computing performance, and are also expected to promote higher artificial intelligence computing performance.
According to the description, the DDR5 MRDIMM memory module will continue the existing RDIMM corresponding pin definition, memory transmission bandwidth, sequence presence detection (SPD), power management chip (PMIC) and other designs, and use multi-row memory particles and multi-channel design to increase the overall transmission bandwidth of the memory module, so that the peak transmission bandwidth of the memory can reach twice that of the existing DDR5 memory, corresponding to approximately 12.8Gbps data transmission rate, but the memory module height will also be relatively high.
As for the LPDDR6 CAMM memory module, it is based on the LPDDR6 memory specification and combined with the CAMM memory specification design. It is expected to be used in devices such as thin and light laptops, and is also expected to be used in desktop motherboards or data center equipment in the future.
Micron previously collaborated with the JEDEC Solid State Technology Association to develop the LPCAMM2 memory module, establishing this design as an industry standard. The LPDDR6 CAMM memory module design announced by JEDEC is also expected to become a unified standard in the future.
