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NVIDIA showcased the Vera Rubin Superchip at GTC DC and revealed details of its Feynman-based GPU, expected to launch in 2028.
The update rhythm will be maintained at two generations of GPUs and one generation of CPUs, and the Kyber rack will be used until the Feynman architecture generation.

Author: Mash Yang
2025-10-29
in exhibition, Market dynamics, network, Processor, Topics
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Last year at Computex 2024, it was confirmed that the next generation GPU codename isRubin, also announced the launch of a GPU called Blackwell Ultra, and revealed at GTC 2025 this year that the next display architecture will be namedFeynmanLater, during his keynote address at the GTC conference in Washington, D.C., NVIDIA founder and CEO Jensen Huang publicly unveiled the actual design of the next-generation superchip "Vera Rubin," which will be launched in 2026. He also announced that the next-generation GPU "Feynman" will be launched in 2028, confirming the update cadence of two GPU generations and one CPU generation.

Vera Rubin module: cable-free slot design, 100 PFLOPS computing power

The actual design of the "Vera Rubin" super chip displayed this time has an architecture similar to the current Grace Blackwell, consisting of a Vera CPU and two Rubin 85 HBM4 GPUs.

Several key designs can be seen from the physical module:

• Vera CPU:The CPU is flanked by LPCAMM2 (or SODIMM2) memory module slots. Jensen Huang revealed that the Vera CPU will feature 88 custom cores based on the Arm Neoverse architecture.

• Cable-free connection:The "Vera Rubin" super chip and the chassis base are no longer connected by traditional cables, but instead use a slot-type design, which will help simplify the server's internal structure, assembly process and heat management.

• Performance indicators:NVIDIA aims to make the "Vera Rubin" super chip achieve up to 100 PFLOPS of AI computing power and be equipped with 2TB of high-speed memory.

Product Roadmap Update: Feynman GPU to be launched in 2028, followed by Vera CPU

In addition to showcasing the actual "Vera Rubin" design, Jensen Huang also updated NVIDIA's previously announced AI HPC product roadmap through 2028. This includes plans for the standard Rubin 85 HBM4 GPU and the Rubin Ultra 165 HBM4e GPU. The previously announced Rubin CPX/CPC chips are designed for large-scale, long-term inference (such as video search and high-quality video generation). They feature an integrated video codec, 28GB of GDDR7 memory, and 30 PFLOPS of performance at NVFP4 precision.

The upcoming "Feynman" GPU architecture is expected to be paired with the next-generation HBM memory design, but its matching CPU will continue to use "Vera", which means maintaining an update rhythm of two GPU generations and one CPU generation.

During this demonstration, NVIDIA simultaneously updated its BlueField-5 DPU, NVLink 8 Switch chip, Spectrum7 204T CPO (Co-Packaged Optics), and CX10 Ethernet chip.

Kyber's rack design will be used until the "Feynman" generation

In addition, the design of the next-generation rack system Kyber NVL576, which is expected to debut simultaneously with the Rubin Ultra, will be used until the "Feynman" generation product is launched in 2028.

NVIDIA revealed that the Kyber NVL576 will utilize an innovative vertical blade module design, combined with new architecture and cooling technologies, to further increase computing density within a single rack. This demonstrates that while NVIDIA is pursuing chip performance improvements, it also prioritizes overall system integration, cooling efficiency, and deployment density.

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Mash Yang

Mash Yang

Founder and editor of mashdigi.com, and student of technology journalism.

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