At the 2026 ISSCC International Solid-State Circuits Conference, MediaTek CEO Rick Tsai delivered a keynote speech exploring how the semiconductor industry can address the ever-increasing demand for AI computing.
In his speech, Tsai Li-hsing stated frankly that although the AI economy has driven enormous economic output, "energy" has become the biggest constraint on innovation to date, with the huge energy consumption of data centers even putting the industry at risk of hitting an "energy wall." However, crises often present opportunities, and energy bottlenecks are simultaneously acting as catalysts for breakthroughs in semiconductor technology.
Regarding how the industry should respond to the explosive growth of AI computing, Tsai Li-hsing raised the focus from a single chip to the "data center rack" level, emphasizing that the core indicators for the future must be closely focused on "performance per watt" and "performance per total cost of ownership".
Therefore, MediaTek believes that the future semiconductor industry must rely on the following energy efficiency innovations and key drivers:
• Energy Efficiency Innovation: DTCO, Power Supply Technology and Computing Architecture
With simply relying on Moore's Law to shrink transistors no longer sufficient to meet demand, Tsai Li-hsing points out that advancements in DTCO (Design Technology Co-optimization) are extremely important. Through close collaboration between chip design and process technology, it can even bring the industry a performance advantage equivalent to half a process node. In addition, continuous improvements in power delivery technology (such as reducing operating voltage) and cross-disciplinary innovations in computing architecture that leverage the participation of mathematicians are the cornerstones for continuously driving overall computing efficiency improvements.
• Key drivers: memory and advanced packaging technology
In the key to continuing the growth of computing power, breakthroughs in memory and advanced packaging technologies will become the core driving force leading the next wave of progress. Tsai Li-hsing pointed out that memory currently accounts for up to 50% of the hardware bill of materials (BOM) cost of AI accelerators (XPUs). In order to meet the stringent requirements of training and inference of large models, not only is greater bandwidth and capacity needed, but new architectures such as compute-in-memory will also play an important role in the future.
Meanwhile, the size of advanced packaging technologies will continue to increase exponentially, and is expected to reach an astonishing scale of 10000 to 20000 millimeters (mm²) in the next few years. Only through 3D stacking technology and better heat dissipation and power management can extremely intensive computing demands be effectively supported.
Analysis of viewpoints
In my opinion, Tsai Li-hsing's "ten-year challenge" to the global semiconductor industry at the end of his speech—aiming to achieve up to 100 times the performance per watt through innovation in architecture, memory, and packaging—not only points out the real challenges of computing power development but also clearly outlines the battlefield of the future semiconductor industry.
In an era where AI is ubiquitous, simply piecing together computing cores can no longer satisfy the market. Only through comprehensive and highly integrated heterogeneous integration of computing chips, memory, high-speed interconnects, and advanced packaging technologies can AI computing power truly be popularized in our lives in a low-cost, low-power, and highly efficient manner.
