As agentic AI workloads become increasingly heavy, data centers' demands for computing performance and energy efficiency are skyrocketing. AMD announced...The sixth-generation EPYC processor, codenamed "Venice"AMD has already taken the lead in Taiwan by adopting TSMC's most advanced 2nm process technology to enter mass production. This is not only a major advancement in AMD's processor roadmap, but also the industry's first 2nm process high-performance computing (HPC) product to officially enter the mass production stage.
Venice, a leading manufacturer of 2nm HPC, is the first to launch its product and plans to establish a plant in Arizona, USA.
The mass production of "Venice" this time establishes AMD's leading advantage in next-generation server processor manufacturing processes.
AMD Chairman and CEO Dr. Lisa Su emphasized that advancing the mass production of "Venice" on TSMC's 2nm process is a crucial step in accelerating the development of next-generation AI infrastructure. Through deep collaboration between the two companies, AMD is able to bring cutting-edge computing technology to market at a speed and scale that meets market demands.
It is worth noting that AMD not only confirmed that "Venice" has entered mass production at TSMC's fab in Taiwan, but also revealed for the first time its future capacity expansion plan - "Venice" will also be mass-produced at TSMC's wafer fab in Arizona, USA.
This move not only echoes the recent trend of "geographical diversification" in the supply chain, but also demonstrates AMD's solid foundation in global advanced capacity scheduling. Dr. C.C. Wei, Chairman and President of TSMC, also stated that the close cooperation between the two companies proves the importance of combining leading process technology with advanced design innovation in driving the next generation of HPC and AI computing.
Addressing the challenge of "proxy AI": Verano's next offensive will incorporate LPDDR technology.
Facing the immense pressure on AI infrastructure in terms of data transmission, networking, storage, and cybersecurity, AMD also revealed the next steps for its 2nm process product line at the event.
• Codenamed "Verano" takes over:Verano, which also belongs to the sixth-generation EPYC processor lineup, will follow in the footsteps of Venice and be manufactured using TSMC's 2nm process.
• First time introducing innovative integration of LPDDR:The biggest highlight of "Verano" is that it will incorporate advanced LPDDR memory innovation technology on the EPYC platform. This design is specifically designed to support cloud and AI computing workloads, and can deliver industry-leading performance per dollar per watt (Perf/Watt/$) in data center environments with extreme power constraints, thereby meeting the growing memory bandwidth requirements of agent-based AI.
Analysis: The "Complete" Display of TSMC's Advanced Process and Packaging Technologies
AMD's early announcement of mass production of its 2nm server chips is undoubtedly a powerful show of force to its competitors (especially Intel, which has been actively promoting its own process technology recently).
This announcement demonstrates the deep integration between AMD and TSMC. AMD's data center and AI product portfolio not only rely entirely on TSMC's advanced manufacturing processes (such as the 2nm process in this case), but also heavily depend on TSMC's globally leading advanced packaging technologies, including 3D stacked SoIC-X and 2.5D CoWoS-L.
When AI computing is no longer just a simple contest of GPU computing power, but a test of the data throughput and coordination capabilities of the entire system, AMD is gradually consolidating its dominant position in modern cloud and AI infrastructure by leveraging the power consumption and performance advantages of its EPYC processors on the 2nm process.
